DDRC QOS Parameter and Related Register Description
===================================================

QOS Parameter Format
--------------------

The QoS parameter format and default values exist in the *binfo_default.json* file:

- qos_common: General parameter
- qos_read: Parameter for reading direction
- qos_write: Parameter for writing direction
 
You can configure the read/write related parameters for each AXI port individually.

Taking *rqos_map_region1* as an example, the correspondence between the parameters and
each AXI port is as follows:

"rqos_map_region1" : [1, 1, 1, 1, 1]

=>

"rqos_map_region1" : [port0, port1, port2, port3, port4]

The rest of the read/write parameters have similar correspondence.

Additionally, the correspondence between AXI port and J5 subsys is as follows:

Correspondence between port and subsys:

+----------+---------+---------+---------+-------------------------+----------+
| Port num |  Port0  |  Port1  |  Port2  |          Port3(APV)     |  Port4   |
+==========+=========+=========+=========+=========================+==========+
| Sys Name | CPU SYS | BPU SYS | CVSYS   | AONSYS/PERISYS/VIDEOSYS | CAMERSYS |
+----------+---------+---------+---------+-------------------------+----------+

QoS parameter format and default values:

.. image:: media_en/6381b4bb0ad2589dd28f8ce06106dbfd.png

In J5 DDRC hardware configuration, the *rqos_map_region2* and *rqos_map_level2* parameters
are reserved and should be ignored in debugging. For details of other parameters, refer to
the :ref:`Related Register Descriptions <register>` section.

.. _register:

Related Register Descriptions
-----------------------------

The register information of the QoS parameter, including the offset address of the
register, the parameter meanings, and the range of valid parameter values, is described as
follows: 

The MEMC_NO_OF_ENTRY in the parameter *lpr_num_entires* description is 64. There are two
DDRCs inside the J5 chip, with the same register offset address, but different register
base address:

-  Register base address of DDRC0: 0x4D000000
-  Register base address of DDRC1: 0x4F000000.

+---------------+--------+------+-----------------+-------------------------------------------------------------------+
| Register Name | Offset | Bits |   Field Name    |                            Description                            |
+===============+========+======+=================+===================================================================+
| SCHED         | 0x250  | 13:8 | lpr_num_entires | Number of entries in the low priority transaction store is this   |
| \             |        |      |                 | value + 1.                                                        |
| \             |        |      |                 | (MEMC_NO_OF_ENTRY - (SCHED.lpr_num_entries +1)) is the number     |
| \             |        |      |                 | of entries available for the high priority transaction store.     |
| \             |        |      |                 | Setting this to maximum value allocates all entries to low        |
| \             |        |      |                 | priority transaction store.                                       |
| \             |        |      |                 | Setting this to 0 allocates 1 entry to low priority transaction   |
| \             |        |      |                 | store and the rest to high priority transaction store.            |
| \             |        |      |                 |                                                                   |
| \             |        |      |                 | **Note:** In ECC configurations,                                  |
| \             |        |      |                 | the numbers of write and low priority read credits issued is one  |
| \             |        |      |                 | less than in the non-ECC case.                                    |
| \             |        |      |                 | One entry each is reserved in the write and low-priority read     |
| \             |        |      |                 | CAMs for storing the RMW requests arising out of single bit error |
| \             |        |      |                 | correction RMW operation.                                         |
| \             |        |      |                 |                                                                   |
| \             |        |      |                 | **Valid Value: 0 ~ 63**                                           |
+---------------+--------+------+-----------------+-------------------------------------------------------------------+

+---------------+--------+-------+---------------------+-------------------------------------------------+
| Register Name | Offset | Bits  |     Field Name      |                   Description                   |
+===============+========+=======+=====================+=================================================+
| PERHPR1       | 0x25C  | 31:24 | hpr_xact_run_length | Indicates the number of transactions that are   |
| \             |        |       |                     | serviced once the HPR queue goes critical is    |
| \             |        |       |                     | the smaller of:                                 |
| \             |        |       |                     |                                                 |
| \             |        |       |                     | ■ (a) This number                               |
| \             |        |       |                     |                                                 |
| \             |        |       |                     | ■ (b) Number of transactions available          |
| \             |        |       |                     |                                                 |
| \             |        |       |                     | Unit: Transaction                               |
| \             |        |       |                     |                                                 |
| \             |        |       |                     | **Valid Value: 0 ~ 255**                        |
+---------------+--------+-------+---------------------+-------------------------------------------------+
| \             | \      | 23:16 |                     | Reserved Filed                                  |
+---------------+--------+-------+---------------------+-------------------------------------------------+
| \             | \      | 15:0  | hpr_max_starve      | Indicates the number of DFI clocks that the HPR |
| \             | \      | \     | \                   | queue can be starved before it goes critical.   |
| \             | \      | \     | \                   | The minimum valid functional value for this     |
| \             | \      | \     | \                   | register is 0x1.                                |
| \             | \      | \     | \                   |                                                 |
| \             | \      | \     | \                   | Programming it to 0x0 disables the starvation   |
| \             | \      | \     | \                   | functionality.                                  |
| \             | \      | \     | \                   |                                                 |
| \             | \      | \     | \                   | During normal operation, this function must     |
| \             | \      | \     | \                   | not be disabled as it causes excessive          |
| \             | \      | \     | \                   | latencies.                                      |
| \             | \      | \     | \                   |                                                 |
| \             | \      | \     | \                   | **Valid Value: 0 ~ 65535**                      |
+---------------+--------+-------+---------------------+-------------------------------------------------+

+---------------+--------+-------+---------------------+-------------------------------------------------+
| Register Name | Offset | Bits  |     Field Name      |                   Description                   |
+===============+========+=======+=====================+=================================================+
| PERLPR1       | 0x264  | 31:24 | lpr_xact_run_length | Indicates the number of transactions that are   |
| \             |        |       |                     | serviced once the LPR queue goes critical is    |
| \             |        |       |                     | the smaller of:                                 |
| \             |        |       |                     |                                                 |
| \             |        |       |                     | ■ (a) This number                               |
| \             |        |       |                     |                                                 |
| \             |        |       |                     | ■ (b) Number of transactions available          |
| \             |        |       |                     |                                                 |
| \             |        |       |                     | Unit: Transaction                               |
| \             |        |       |                     |                                                 |
| \             |        |       |                     | **Valid Value: 0 ~ 255**                        |
+---------------+--------+-------+---------------------+-------------------------------------------------+
| \             | \      | 23:16 |                     | Reserved Filed                                  |
+---------------+--------+-------+---------------------+-------------------------------------------------+
| \             | \      | 15:0  | lpr_max_starve      | Indicates the number of DFI clocks that the LPR |
| \             | \      | \     | \                   | queue can be starved before it goes critical.   |
| \             | \      | \     | \                   | The minimum valid functional value for this     |
| \             | \      | \     | \                   | register is 0x1.                                |
| \             | \      | \     | \                   |                                                 |
| \             | \      | \     | \                   | Programming it to 0x0 disables the starvation   |
| \             | \      | \     | \                   | functionality.                                  |
| \             | \      | \     | \                   |                                                 |
| \             | \      | \     | \                   | During normal operation, this function must     |
| \             | \      | \     | \                   | not be disabled as it causes excessive          |
| \             | \      | \     | \                   | latencies.                                      |
| \             | \      | \     | \                   |                                                 |
| \             | \      | \     | \                   | **Valid Value: 0 ~ 65535**                      |
+---------------+--------+-------+---------------------+-------------------------------------------------+


+---------------+--------+-------+-------------------+--------------------------------------------------------+
| Register Name | Offset | Bits  |    Field Name     |                      Description                       |
+===============+========+=======+===================+========================================================+
| PERWR1        | 0x26C  | 31:24 | w_xact_run_length | Indicates the number of transactions that are serviced |
| \             |        |       |                   | once the WR queue goes critical is the smaller of:     |
| \             |        |       |                   |                                                        |
| \             |        |       |                   | ■ (a) This number                                      |
| \             |        |       |                   |                                                        |
| \             |        |       |                   | ■ (b) Number of transactions available                 |
| \             |        |       |                   |                                                        |
| \             |        |       |                   | Unit: Transaction                                      |
| \             |        |       |                   |                                                        |
| \             |        |       |                   | **Valid Value: 0 ~ 255**                               |
+---------------+--------+-------+-------------------+--------------------------------------------------------+
|               |        | 23:16 |                   | Reserved Filed                                         |
+---------------+--------+-------+-------------------+--------------------------------------------------------+
|               |        | 15:0  | w_max_starve      | Indicates the number of DFI clocks that the WR queue   |
|               |        |       |                   | can be starved before it goes critical. The minimum    |
|               |        |       |                   | valid functional value for this register is 0x1.       |
|               |        |       |                   | Programming it to 0x0 disables the starvation          |
|               |        |       |                   | functionality. During normal operation, this function  |
|               |        |       |                   | must not be disabled as it causes excessive            |
|               |        |       |                   | latencies.\ **Valid Value: 0 ~ 65535**                 |
+---------------+--------+-------+-------------------+--------------------------------------------------------+

+--------------------------+--------------+-------+------------------+--------------------------------------------------------+
|      Register Name       |    Offset    | Bits  |    Field Name    |                      Description                       |
+==========================+==============+=======+==================+========================================================+
| PCFGQOS0_n(for n=0;n<=4) | 0x494+0xB0*n | 31:22 |                  | Reserved Filed                                         |
+--------------------------+--------------+-------+------------------+--------------------------------------------------------+
|                          |              | 21:20 | rqos_map_region1 | This bit field indicates the traffic class of region1. |
|                          |              |       |                  | Valid values are:                                      |
|                          |              |       |                  |                                                        |
|                          |              |       |                  | ■ 0 - LPR                                              |
|                          |              |       |                  |                                                        |
|                          |              |       |                  | ■ 1 - VPR                                              |
|                          |              |       |                  |                                                        |
|                          |              |       |                  | ■ 2 - HPR                                              |
+--------------------------+--------------+-------+------------------+--------------------------------------------------------+
|                          |              | 19:18 |                  | Reserved Filed                                         |
|                          |              |       |                  |                                                        |
|                          |              |       |                  |                                                        |
|                          |              |       |                  |                                                        |
|                          |              |       |                  |                                                        |
+--------------------------+--------------+-------+------------------+--------------------------------------------------------+
|                          |              | 17:16 | rqos_map_region0 | This bit field indicates the traffic class of region   |
|                          |              |       |                  | 0. Valid values are:                                   |
|                          |              |       |                  |                                                        |
|                          |              |       |                  | ■ 0 - LPR                                              |
|                          |              |       |                  |                                                        |
|                          |              |       |                  | ■ 1 - VPR                                              |
|                          |              |       |                  |                                                        |
|                          |              |       |                  | ■ 2 - HPR                                              |
+--------------------------+--------------+-------+------------------+--------------------------------------------------------+
|                          |              | 15:4  |                  | Reserved Filed                                         |
|                          |              |       |                  |                                                        |
|                          |              |       |                  |                                                        |
|                          |              |       |                  |                                                        |
+--------------------------+--------------+-------+------------------+--------------------------------------------------------+
|                          |              | 3:0   | rqos_map_level1  | Separation level1 indicating the end of region0        |
|                          |              |       |                  | mapping; start of region0 is 0. Possible values for    |
|                          |              |       |                  | level1 are 0 to 14 which corresponds to arqos.         |
|                          |              |       |                  |                                                        |
|                          |              |       |                  | **Note**                                               |
|                          |              |       |                  | that for PA, arqos values are used directly as port    |
|                          |              |       |                  | priorities, where the higher the value corresponds to  |
|                          |              |       |                  | the higher port priority.                              |
|                          |              |       |                  |                                                        |
|                          |              |       |                  | All the map_level\* registers                          |
|                          |              |       |                  | must be set to distinct values                         |
+--------------------------+--------------+-------+------------------+--------------------------------------------------------+

+--------------------------+--------------+-------+-------------------+--------------------------------------------------------+
|      Register Name       |    Offset    | Bits  |    Field Name     |                      Description                       |
+==========================+==============+=======+===================+========================================================+
| PCFGQOS1_n(for n=0;n<=4) | 0x498+0xB0*n | 31:27 |                   | Reserved Filed                                         |
+--------------------------+--------------+-------+-------------------+--------------------------------------------------------+
|                          |              | 26:16 | rqos_map_timeoutr | Specifies the timeout value for transactions mapped to |
|                          |              |       |                   | the red address queue.\                                |
|                          |              |       |                   |                                                        |
|                          |              |       |                   | **Valid Value: 0 ~ 2047**                              |
+--------------------------+--------------+-------+-------------------+--------------------------------------------------------+
|                          |              | 15:11 |                   | Reserved Filed                                         |
+--------------------------+--------------+-------+-------------------+--------------------------------------------------------+
|                          |              | 10:0  | rqos_map_timeoutb | Specifies the timeout value for transactions mapped to |
|                          |              |       |                   | the blue address queue.\                               |
|                          |              |       |                   |                                                        |
|                          |              |       |                   | **Valid Value: 0 ~ 2047**                              |
+--------------------------+--------------+-------+-------------------+--------------------------------------------------------+


+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|       Register Name       |    Offset    | Bits  |    Field Name     |                      Description                      |
+===========================+==============+=======+===================+=======================================================+
| PCFGWQOS0_n(for n=0;n<=4) | 0x49C+0xB0*n | 31:26 |                   | Reserved Filed                                        |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 25:24 | wrqos_map_region2 | This bit field indicates the traffic class of region  |
|                           |              |       |                   | 2. Valid values are:                                  |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | ■ 0 - NPW                                             |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | ■ 1 - VPW                                             |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 23:22 |                   | Reserved Filed                                        |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 21:20 | wqos_map_region1  | This bit field indicates the traffic class of region  |
|                           |              |       |                   | 1. Valid values are:                                  |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | ■ 0 - NPW                                             |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | ■ 1 - VPW                                             |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 19:18 |                   | Reserved Filed                                        |
|                           |              |       |                   |                                                       |
|                           |              |       |                   |                                                       |
|                           |              |       |                   |                                                       |
|                           |              |       |                   |                                                       |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 17:16 | wqos_map_region0  | This bit field indicates the traffic class of region  |
|                           |              |       |                   | 0. Valid values are:                                  |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | ■ 0 - NPW                                             |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | ■ 1 - VPW                                             |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 15:12 |                   | Reserved Filed                                        |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 11:8  | wqos_map_level2   | Separation level2 indicating the end of region1       |
|                           |              |       |                   | mapping; start of region1 is (level1 + 1).            |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | Possible                                              |
|                           |              |       |                   | values for level2 are (level1 + 1) to 14 which        |
|                           |              |       |                   | corresponds to awqos.                                 |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | Region2 starts from (level2 + 1)                      |
|                           |              |       |                   | up to 15.                                             |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | Note that for PA, awqos values are used               |
|                           |              |       |                   | directly as port priorities, where the higher the     |
|                           |              |       |                   | value corresponds to the higher port priority.        |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | All the                                               |
|                           |              |       |                   | map_level\* registers must be set to distinct values. |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 7:4   |                   | Reserved Filed                                        |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 3:0   | wqos_map_level1   | Separation level indicating the end of region0        |
|                           |              |       |                   | mapping; start of region0 is 0.                       |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | Possible values for                                   |
|                           |              |       |                   | level1 are 0 to 13 which corresponds to awqos.        |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | Note                                                  |
|                           |              |       |                   | that for PA, awqos values are used directly as port   |
|                           |              |       |                   | priorities, where the higher the value corresponds to |
|                           |              |       |                   | the higher port priority.                             |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | All the map_level\* registers                         |
|                           |              |       |                   | must be set to distinct values.                       |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+


+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|       Register Name       |    Offset    | Bits  |    Field Name     |                      Description                      |
+===========================+==============+=======+===================+=======================================================+
| PCFGWQOS1_n(for n=0;n<=4) | 0x498+0xB0*n | 31:27 |                   | Reserved Filed                                        |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 26:16 | wqos_map_timeout2 | Specifies the timeout value for write transactions in |
|                           |              |       |                   | region2.                                              |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | **Valid Value: 0 ~ 2047**                             |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 15:11 |                   | Reserved Filed                                        |
|                           |              |       |                   |                                                       |
|                           |              |       |                   |                                                       |
|                           |              |       |                   |                                                       |
|                           |              |       |                   |                                                       |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
|                           |              | 10:0  | wqos_map_timeout1 | Specifies the timeout value for write transactions in |
|                           |              |       |                   | region 0 and 1.\                                      |
|                           |              |       |                   |                                                       |
|                           |              |       |                   | **Valid Value: 0 ~ 2047**                             |
+---------------------------+--------------+-------+-------------------+-------------------------------------------------------+
